1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically, to a semiconductor device that automatically adjusts AC timing of an interface circuit part when a power supply voltage is changed.
2. Description of Related Art
In general-purpose products such as CPU, memory or the like, a power supply voltage of an interface circuit part may be changed as the performance of products (including an internal circuit) is enhanced. In this case, as shown in FIG. 7 for example, a power supply voltage in an interface (I/F) circuit part for output (P in FIG. 7) of a semiconductor device such as ASIC connected to the CPU or the memory which is the general-purpose product also needs to be changed as well.
When the power supply voltage for I/F circuit of the semiconductor device such as ASIC needs to be changed, the process of the I/F circuit part or the internal circuit such as delay adjustment for adjusting the AC timing needs to be changed. As such, the semiconductor device is often replaced with a new device which is redesigned and newly manufactured. However, this increases the number of processes due to the redesigning and increases the cost involved in the remanufacturing.
It may also be possible to use the semiconductor device without replacing the device with the new semiconductor device even when the power supply voltage for I/F circuit is changed. However, in this case, the output timing of the data signal of the I/F circuit may vary depending on the power supply voltage, which causes difference of the AC timing.
More specifically, as shown in FIG. 8, as the power supply voltage decreases, the rising of an output waveform becomes dull due to the insufficiency of the drive ability of the output buffer. For example, when the power supply voltage is decreased from 2.5 V to 1.8 V, the drive ability of the final stage transistor of the output buffer driven in this power supply voltage decreases, which causes the delay variation due to the dullness of the rising and falling of the output waveform caused by the load capacitance dependency. Thus, the delay of the output signal of the I/F circuit part increases from t1 to t3, for example, with respect to an input signal, which changes the AC timing. In order to prevent this, the circuit needs to be remanufactured after changing the type of Mox (multi oxide) transistors, or the circuit needs to be redesigned in order to adjust the delay in the internal circuit. At any rate, the circuit needs to be redesigned or remanufactured corresponding to the voltage change in accordance with the change of the power supply voltage for I/F circuit. It may also be conceived to design the semiconductor device with a timing including large margin in consideration of such a delay in advance. However, such a design may cause degradation of characteristics such as the response speed of the semiconductor device.
Accordingly, it may be possible to use an interface circuit 30 in which the drive ability is variable on the assumption of the change of the power supply voltage for I/F in a semiconductor device 1 in advance as shown in FIG. 9. In this case, when the power supply voltage of a power supply for I/F circuit 10 is changed, the interface circuit 30 obtains a desired driving current value by changing the number of final stage transistors driven by external control signals, for example. Further, an internal circuit for delay adjustment is employed to adjust the delay time by the external set signal, for example.
Further, Japanese Unexamined Patent Application Publication No. 2003-133938 (Okamoto et al.) discloses a technique of driving an output node with optimal drive ability even when the output power supply voltage is changed.